DSP56F827FG80 查看數據表（PDF） - Motorola => Freescale

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DSP56F827FG80

16-bit Hybrid Controller

Motorola => Freescale 

Freescale Semiconductor, Inc.

Introduction

Part 2 Signal/Connection Descriptions

2.1 Introduction

The input and output signals of the 56F827 are organized into functional groups, as shown in Table 2 and

as illustrated in Figure 2. Table 3 describes the signal or signals present on a pin.

Table 2. Functional Group Pin Allocations

Functional Group

Number of Pins

Power (VDD, VDDIO, VDDA or VDDA_ADC)

(3,5,1,1)

Ground (VSS, VSSIO, VSSA, orVSSA_ADC )

(3,5,1,1)

VPP

1

PLL and Clock

3

Address Bus1

16

Data Bus1

16

Bus Control

4

Quad Timer Module Ports1

4

JTAG/On-Chip Emulation (OnCE)

6

Dedicated General Purpose Input/Output

16

Synchronous Serial Interface (SSI) Port1

6

Serial Peripheral Interface (SPI) Port1

4

Serial Communications Interface1 (SCI0, SCI1) Port2

4

Serial Communications Interface2 (SCI2) Port1

2

Analog to Digital Converter (ADC)

15

Programmable Chip Select (PCS)3

6

Interrupt and Program Control

5

1. Alternately, GPIO pins

2. Alternately, SPI pins

3. In addition, 2 Bus Control pins can be programmed as PCS[0-1].

56F827 Technical Data

5

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Go to: www.freescale.com

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