56F801E 查看數據表（PDF） - Freescale Semiconductor

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56F801E

16-bit Digital Signal Controllers

Freescale Semiconductor 

Part 2 Signal/Connection Descriptions

2.1 Introduction

The input and output signals of the 56F801 are organized into functional groups, as shown in Table 2-1

and as illustrated in Figure 2-1. In Table 2-2 through Table 2-12, each table row describes the signal or

signals present on a pin.

Table 2-1 Functional Group Pin Allocations

Functional Group

Number of

Pins

Detailed

Description

Power (VDD or VDDA)

Ground (VSS or VSSA)

Supply Capacitors

PLL and Clock

Interrupt and Program Control

Pulse Width Modulator (PWM) Port

Serial Peripheral Interface (SPI) Port1

Serial Communications Interface (SCI) Port1

Analog-to-Digital Converter (ADC) Port

Quad Timer Module Port

JTAG/On-Chip Emulation (OnCE)

1. Alternately, GPIO pins

5

Table 2-2

6

Table 2-3

2

Table 2-4

2

Table 2-5

2

Table 2-6

7

Table 2-7

4

Table 2-8

2

Table 2-9

9

Table 2-10

3

Table 2-11

6

Table 2-12

56F801 Technical Data, Rev. 17

8

Freescale Semiconductor

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