DSP56F826PB 查看數據表（PDF） - Freescale Semiconductor
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DSP56F826PB Datasheet PDF : 56 Pages
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2.2 Signals and Package Information
All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always
enabled. Exceptions:
1. When a pin is owned by GPIO, then the pull-up may be disabled under software control.
2. TCK has a weak pull-down circuit always active.
Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP
Signal
Name
VDD
VDD
VDD
VDDA
VDDIO
VDDIO
VDDIO
VDDIO
VSS
VSS
VSS
VSSA
VSSIO
VSSIO
VSSIO
VSSIO
TCS
EXTAL
Pin No.
Type
Description
20
VDD
Power—These pins provide power to the internal structures of the chip, and are
generally connected to a 2.5V supply.
64
VDD
94
VDD
59
VDDA
Analog Power—This pin is a dedicated power pin for the analog portion of the
chip and should be connected to a low-noise 3.3V supply.
5
VDDIO
Power In/Out—These pins provide power to the I/O structures of the chip, and
are generally connected to a 3.3V supply.
30
VDDIO
57
VDDIO
80
VDDIO
19
VSS
GND—These pins provide grounding for the internal structures of the chip. All
63
VSS
should be attached to VSS.
95
VSS
60
VSSA
Analog Ground—This pin supplies an analog ground.
6
VSSIO
GND In/Out—These pins provide grounding for the I/O ring on the chip. All
31
VSSIO
should be attached to VSS.
58
VSSIO
81
VSSIO
99
Input/Output TCS—This pin is reserved for factory use. It must be tied to VSS for normal use.
(Schmitt) In block diagrams, this pin is considered an additional VSS.
61
Input
External Crystal Oscillator Input—This input should be connected to a 4MHz
external crystal or ceramic resonator. For more information, please refer to
Section 3.6.
56F826 Technical Data, Rev. 14
10
Freescale Semiconductor
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