General Description
• Two 8-bit ports with key wake-up interrupt
• Clock generation
– Phase-locked loop clock frequency multiplier
– Limp home mode in absence of external clock
– Slow mode divider
– Low power 0.5 to 16 MHz crystal oscillator reference clock
• 112-Pin TQFP package
– Up to 66 general-purpose I/O lines, plus up to 18 input-only
lines
• 8MHz operation at 5V
• Development support
– Single-wire background debug™ mode (BDM)
– On-chip hardware breakpoints
68HC(9)12DG128 Rev 1.0
14
General Description
4-gen
MOTOROLA