73K224BL-IH/F 查看數據表（PDF） - Teridian Semiconductor Corporation

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73K224BL-IH/F

V.22bis, V.22, V.21, Bell 212A, 103 Single-Chip Modem w/ Integrated Hybrid

Teridian Semiconductor Corporation 

73K224BL

V.22bis, V.22, V.21, Bell 212A, 103

Single-Chip Modem w/ Integrated Hybrid

DATA SHEET

CONTROL REGISTER 0

CR0

D7

D6

D5

D4

D3

D2

D1

D0

ADDR

000

BIT

D0

D1

D5,D4

D3,D2

D6,D5

MODUL. MODUL.

OPTION TYPE 1

NAME

Answer/

Originate

Transmit

Enable

Transmit

Mode

Modulation

Type

MODUL. TRANSMIT TRANSMIT TRANSMIT TRANSMIT

TYPE 0

MODE 2

MODE 1

MODE 0

ENABLE

ANSWER/

ORIGINATE

CONDITION DESCRIPTION

0

Selects answer mode (transmit in high band, receive

in low band).

1

Selects originate mode (transmit in low band, receive in

high band).

0

Disables transmit output at TXA1 & TXA2

1

Enables transmit output at TXA1 & TXA2

Note: Transmit enable must be set to 1 to allow activation

of answer tone or DTMF.

D5 D4 D3 D2

0 0 0 0 Selects Power down mode. All functions disabled except

digital interface..

0001

Internal synchronous mode in this mode TXCLK is an

internally derived 600,1200 or 2400 Hz signal. Serial input

data appearing at TXD must be valid on the rising edge of

TXCLK. Receive data is clocked out of RXD on the falling

edge of RXCLK.

0010

External synchronous mode. Operation is identical to

internal synchronous, but TXCLK is connected internally to

EXCLK pin, and a 600, 1200 or 2400 Hz clock must be

supplied externally.

0 0 1 1 Slave synchronous mode Same operation as other

synchronous modes TXCLK is connected internally to the

RXCLK pin in this mode.

0 1 0 0 Selects a synchronous mode 8 bits/character (1 start bit, 6

data bits, 1 stop bit).

0 1 0 1 Selects asynchronous mode - 9 bits/character (1 start bit, 7

data bits, 1 stop bit).

0 1 1 0 Selects asynchronous mode - 10 bits/character (1 start bit,

8 data bits, 1 stop bit).

0 1 1 1 Selects asynchronous mode - 11 bits/character (1 start bit,

8 data bits, 1 stop bit) or 2 stop bits)..

1 X 0 0 Selects FSK operation.

D6 D5

10

QAM

00

DPSK

01

FSK

Page: 10 of 33

© 2005, 2008 TERIDIAN Semiconductor Corporation

Rev 7.1

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