73K224L-28IH 查看數據表（PDF） - Teridian Semiconductor Corporation
零件编号
产品描述 (功能)
生产厂家
73K224L-28IH Datasheet PDF : 31 Pages
| |||
73K224L
V.22bis, V.22, V.21, Bell 212A, 103
Single-Chip Modem
DATA SHEET
CONTROL REGISTER 0 (continued)
CR0
000
D7
MODUL.
OPTION
D6
MODUL.
TYPE 1
BIT NO.
NAME
D7
Modulation
Option
D5
D4
D3
D2
D1
D0
MODUL. TRANSMIT TRANSMIT TRANSMIT TRANSMIT
TYPE 0
MODE 2
MODE 1
MODE 0
ENABLE
ANSWER/
ORIGINATE
CONDITION DESCRIPTION
0
QAM selects 2400 bit/s. DPSK selects 1200 bit/s.
FSK selects 103 mode.
1
DPSK selects 600 bit/s.
FSK selects V.21 mode.
CONTROL REGISTER 1
D7
D6
D5
CR1
001
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
INT.
BIT NO.
NAME
CONDITION
D1 D0
D1, D0
Test Mode
00
01
D2
Reset
10
11
0
1
D3
Clock Control
0
1
D4
BYPASS
SCRAMB
D3
CLK
CONTROL
D2
RESET
DESCRIPTION
D1
TEST
MODE 1
D0
TEST
MODE 0
Selects normal operating mode.
Analog loopback mode. Loops the transmitted analog
signal back to the receiver, and causes the receiver to use
the same carrier frequency as the transmitter. To squelch
the TXA pin, TRANSMIT ENABLE bit as well as Tone Reg
bit D2 must be low.
Selects remote digital loopback. Received data is looped
back to transmit data internally, and RXD is forced to a
mark. Data on TXD is ignored.
Selects local digital loopback. Internally loops TXD back to
RXD and continues to transmit data carrier at TXA pin.
Selects normal operation.
Resets modem to power down state. All control register bits
(CR0, CR1, CR2, CR3 and Tone) are reset to zero except
CR3 bit D2. The output of the clock pin will be set to the
crystal frequency.
Selects 11.0592 MHz crystal echo output at CLK pin.
Selects 16 X the data rate, output at CLK pin in DPSK/QAM
modes only.
Page: 9 of 31
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1
Share Link: 