73S8014RN 查看數據表（PDF） - Teridian Semiconductor Corporation

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73S8014RN

Smart Card Interface

Teridian Semiconductor Corporation 

73S8014RN Data Sheet

DS_8014RN_014

Figures

Figure 1: 73S8014RN Block Diagram ....................................................................................................................... 2

Figure 2: 73S8014RN 20-SOP Pin Out ..................................................................................................................... 5

Figure 3: 73S8014RN – Typical Application Schematic.......................................................................................... 14

Figure 4: Activation Sequence – RSTIN Low When CMDVCC Goes Low ............................................................. 16

Figure 5: Activation Sequence – RSTIN High When CMDVCC Goes Low............................................................. 17

Figure 6: Deactivation Sequence ............................................................................................................................ 18

Figure 7: Timing Diagram – Management of the Interrupt Line OFF ...................................................................... 19

Figure 8: I/O and I/OUC State Diagram................................................................................................................... 20

Figure 9: I/O – I/OUC Delays – Timing Diagram ..................................................................................................... 20

Figure 10: Open Drain type – OFF .......................................................................................................................... 21

Figure 11: Power Input/Output Circuit, VDD, VPC, VCC .............................................................................................. 21

Figure 12: Type 5 – Smart Card CLK Driver Circuit ................................................................................................ 22

Figure 13: Type 6 – Smart Card RST Driver Circuit ................................................................................................ 22

Figure 14: Type 7A – Smart Card IO Interface Circuit ............................................................................................ 23

Figure 15: Type 7B – Smart Card IOUC Interface Circuit ....................................................................................... 23

Figure 16: Type 8 – General Input Circuit ............................................................................................................... 24

Figure 17: Oscillator Circuit ..................................................................................................................................... 24

Figure 18: VDDFLT_ADJ .............................................................................................................................................. 25

Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 26

Tables

Table 1: 73S8014RN 20-Pin SOP Pin Definitions ..................................................................................................... 6

Table 2: Absolute Maximum Device Ratings............................................................................................................. 8

Table 3: Recommended Operating Conditions ......................................................................................................... 8

Table 4: Package Thermal Parameters..................................................................................................................... 8

Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9

Table 6: Digital Signals Characteristics ................................................................................................................... 11

Table 7: DC Characteristics..................................................................................................................................... 12

Table 8: Voltage Fault Detection Circuits ................................................................................................................ 12

Table 9: Order Numbers and Packaging Marks ...................................................................................................... 27

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Rev. 1.0

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