74AHC74_08 查看數據表（PDF） - NXP Semiconductors.
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74AHC74_08 Datasheet PDF : 18 Pages
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NXP Semiconductors
74AHC74; 74AHCT74
Dual D-type flip-flop with set and reset; positive-edge trigger
5. Pinning information
5.1 Pinning
1RD 1
1D 2
1CP 3
1SD 4
1Q 5
1Q 6
GND 7
14 VCC
13 2RD
12 2D
74
11 2CP
10 2SD
9 2Q
8 2Q
001aac449
Fig 5. Pin configuration SO14 and TSSOP14
terminal 1
index area
1D 2
1CP 3
1SD 4
1Q 5
1Q 6
74
GND(1)
13 2RD
12 2D
11 2CP
10 2SD
9 2Q
001aac450
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used
as supply pin or input.
Fig 6. Pin configuration DHVQFN14
5.2 Pin description
Table 2.
Symbol
1RD
1D
1CP
1SD
1Q
1Q
GND
2Q
2Q
2SD
2CP
2D
2RD
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
asynchronous reset direct input (active LOW)
data input
clock input (LOW to HIGH, edge-triggered)
asynchronous set direct input (active LOW)
true flip-flop output
complement flip-flop output
ground (0 V)
complement flip-flop output
true flip-flop output
asynchronous set direct input (active LOW)
clock input (LOW to HIGH, edge-triggered)
data input
asynchronous reset direct input (active LOW)
supply voltage
74AHC_AHCT74_5
Product data sheet
Rev. 05 — 9 June 2008
© NXP B.V. 2008. All rights reserved.
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