74AHC74D,112 查看數據表（PDF） - NXP Semiconductors.
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74AHC74D,112 Datasheet PDF : 18 Pages
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NXP Semiconductors
74AHC74; 74AHCT74
Dual D-type flip-flop with set and reset; positive-edge trigger
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ[1] Max Min Max
Min
Max
CPD
power
fi = 1 MHz; VI = GND to VCC [3] -
12
-
-
-
-
- pF
dissipation
capacitance
74AHCT74; VCC = 4.5 V to 5.5 V
tpd
propagation nCP to nQ, nQ; see Figure 7 [2]
delay
CL = 15 pF
- 3.3 7.8 1.0
9.0
1.0
10.0 ns
CL = 50 pF
- 4.8 8.8 1.0 10.0
1.0
11.0 ns
nSD, nRD to nQ, nQ;
see Figure 7
CL = 15 pF
CL = 50 pF
fmax
maximum see Figure 7
frequency
CL = 15 pF
CL = 50 pF
tW
pulse width CP HIGH or LOW;
nSD, nRD LOW;
see Figure 7 and 8
- 3.7 10.4 1.0 12.0
1.0
13.0 ns
- 5.3 11.4 1.0 13.0
1.0
14.5 ns
100 160 -
80
-
80
- MHz
80 140 -
65
-
65
- MHz
5.0 -
-
5.0
-
5.0
- ns
tsu
set-up time nD to nCP; see Figure 7
th
hold time nD to nCP; see Figure 7
trec
recovery nRD to nCP; see Figure 8
time
5.0 -
-
5.0
-
5.0
- ns
0
-
-
0
-
0
- ns
3.5 -
-
3.5
-
3.5
- ns
CPD
power
fi = 1 MHz; VI = GND to VCC [3] -
16
-
-
-
-
- pF
dissipation
capacitance
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
74AHC_AHCT74_5
Product data sheet
Rev. 05 — 9 June 2008
© NXP B.V. 2008. All rights reserved.
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