Philips Semiconductors
1-of-8 decoder/demultiplexer
Product specification
74ALS138
FEATURES
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
DESCRIPTION
The 74ALS138 decoder accepts three binary weighted inputs (A0,
A1, A2) and when enabled, provides eight mutually exclusive,
active-Low outputs (Q0 – Q7). The device features three Enable
inputs; two active-Low (E0, E1) and one active-High (E2). Every
output will be High unless E0 and E1 are Low and E2 is High. This
multiple enable function allows easy parallel expansion of the device
to 1-of-32 (5 lines to 32 lines) decoder with just four 74ALS138s and
one inverter. The device can be used as an eight output
demultiplexer by using one of the active-Low Enable inputs as the
data input and the remaining Enable inputs as strobes. Enable
inputs not used must be permanently tied to their appropriate
active-High or active-Low state.
TYPE
TYPICAL
PROPAGATION DELAY
74ALS138
12.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
4.0mA
PIN CONFIGURATION
A0 1
A1 2
A2 3
E0 4
E1 5
E2 6
Q7 7
GND 8
16 VCC
15 Q0
14 Q1
13 Q2
12 Q3
11 Q4
10 Q5
9 Q6
SF00174
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
16-pin plastic DIP
74ALS138N
16-pin plastic SO
74ALS138D
DRAWING
NUMBER
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
A0 – A2
Address inputs
1.0/1.0
E0, E1
Enable inputs (active-Low)
1.0/1.0
E2
Enable input (active-High)
1.0/1.0
Q0 – Q7
Data outputs (active-Low)
50/33
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
LOAD VALUE
HIGH/LOW
20µA/0.1mA
20µA/0.1mA
20µA/0.1mA
1.0mA/20mA
1 23
4
E0
5
E1
A0 A1 A2
6
E2
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
VCC = Pin 16
GND = Pin 8
15 14 13 12 11 10 9 7
SF00175
DX
1
15
0
0
2
G
0
7
1
14
3
13
2
2
12
3
11
4
&
10
5
9
6
7
SC00047
1996 Jul 03
2
853–1848 17016