74AVC16835DGG 查看數據表（PDF） - Philips Electronics
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74AVC16835DGG Datasheet PDF : 10 Pages
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Philips Semiconductors
18-bit Registered Driver (3-State)
Preliminary specification
74AVC16835
PIN DESCRIPTION
PIN NUMBER
1, 2, 55
3, 5, 6, 8, 9, 10, 12, 13,
14, 15, 16, 17, 19, 20,
21, 23, 24, 26
4, 11, 18, 25, 32, 39, 46,
53, 56
7, 22, 35, 50
27
28
30
54, 52, 51, 49, 48, 47,
45, 44, 43, 42, 41, 40,
38, 37, 36, 34, 33, 31
SYMBOL NAME AND FUNCTION
NC
No connection
Y0 to Y17 Data outputs
GND
VCC
OE
LE
CP
Ground (0V)
Positive supply voltage
Output enable input
(active LOW)
Latch enable input
(active HIGH)
Clock input
A0 to A17 Data inputs
LOGIC SYMBOL
OE
CP
LE
A0
D
LE
Y0
CP
TO THE 17 OTHER CHANNELS
SH00138
LOGIC SYMBOL (IEEE/IEC)
OE
27
CP 30
LE 28
Y0
3
Y1
5
Y2
6
Y3
8
Y4
9
Y5
10
Y6
12
Y7
13
Y8
14
Y9
15
Y10
16
Y11
17
Y12
19
Y13
20
Y14
21
Y15
23
Y16
24
Y17
26
EN1
2C3
C3
G2
1∇
1 3D
54 A0
52 A1
51 A2
49 A3
48 A4
47 A5
45 A6
44 A7
43 A8
42 A9
41 A10
40 A11
38 A12
37 A13
36 A14
34 A15
33 A16
31 A17
SH00154
FUNCTION TABLE
INPUTS
OE
LE
CP
OUTPUTS
A
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
↑
L
L
L
L
↑
H
H
L
L
H
X
Y01
L
L
L
X
Y02
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High impedance “off” state
↑ = LOW-to-HIGH level transition
NOTES:
1. Output level before the indicated steady-state input conditions
were established, provided that CP is high before LE goes low.
2. Output level before the indicated steady-state input conditions
were established.
1999 Jul 23
3
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