74F113 查看數據表（PDF） - Philips Electronics
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74F113 Datasheet PDF : 10 Pages
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Philips Semiconductors
Dual J-K negative edge-triggered flip-flops
without reset
Product specification
74F113
LOGIC DIAGRAM
Q 5, 9
SD 4, 10
2, 12
K
VCC = Pin 14
GND = Pin 7
1, 13
CP
6, 8
Q
3, 11
J
SF00143
FUNCTION TABLE
INPUTS
SD CP J
OUTPUTS
OPERATING MODE
KQQ
LXXXH
L Asynchronous set
H↓
h
h
q
q Toggle
H↓
h
l
H
L Load ”1” (set)
H↓
l
h
L H Load ”0” (reset)
H↓
l
l
q
q Hold ’no change”
NOTES:
H = High-voltage level
h = High-voltage level one setup time prior to high-to-low
clock transition
L = Low-voltage level
l = Low-voltage level one setup time prior to high-to-low clock
transition
q = Lower case indicate the state of the referenced output
prior to the high-to-low clock transition
X = Don’t care
↓ = high-to-low clock transition
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
VCC
VIN
IIN
VOUT
IOUT
Tamb
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Commercial range
Industrial range
Tstg
Storage temperature range
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to VCC
40
0 to +70
–40 to +85
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VIH
VIL
IIK
IOH
IOL
Tamb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
Commercial range
Industrial range
LIMITS
MIN
NOM
MAX
4.5
5.0
5.5
2.0
0.8
–18
–1
20
0
+70
–40
+85
UNIT
V
V
V
mA
mA
mA
°C
°C
1996 Mar 14
3
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