74F114 查看數據表（PDF） - Philips Electronics
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74F114 Datasheet PDF : 6 Pages
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Philips Semiconductors
Dual J-K negative edge-triggered flip-flop
with common clock and reset
Product specification
74F114
Jn, Kn
SDn VM
tw(L)
CP
VM
tREC
VM
tPLH
Qn
VM
tPHL
Qn
VM
Waveform 2. Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock
SF00115
Jn, Kn
RD VM
CP
Qn
Qn
tw(L)
VM
tREC
VM
tPHL
VM
tPLH
VM
SF00116
Waveform 3. Propagation Delay for Reset to Output, Reset Pulse Width, and Recovery Time for Reset to Clock
1996 Mar 14
5
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