74F189SJ 查看數據表（PDF） - Fairchild Semiconductor
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74F189SJ Datasheet PDF : 7 Pages
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Unit Loading/Fan Out
Pin Names
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
A0–A3
CS
Address Inputs
Chip Select Input (Active LOW)
1.0/1.0
1.0/1.0
20 µA/−0.6 mA
20 µA/−1.2 mA
WE
Write Enable Input (Active LOW) 1.0/1.0
20 µA/−0.6 mA
D0–D3
O 0–O 3
Data Inputs
Inverted Data Outputs
1.0/1.0
20 µA/−0.6 mA
150/40 (33.3) −3.0 mA/24 mA (20 mA)
Function Table
Inputs
CS
WE
L
L
L
H
H
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Block Diagram
Operation
Condition of Outputs
Write
Read
Inhibit
High Impedance
Complement of Stored Data
High Impedance
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