74HCT02PW(2008) 查看數據表（PDF） - NXP Semiconductors.

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74HCT02PW
(Rev.:2008)

Quad 2-input NOR gate

NXP Semiconductors. 

74HC02; 74HCT02

Quad 2-input NOR gate

Rev. 03 — 18 September 2008

Product data sheet

1. General description

The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC

standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).

The 74HC02; 74HCT02 provides a quad 2-input NOR function.

2. Features

I Input levels:

N For 74HC02: CMOS level

N For 74HCT02: TTL level

I ESD protection:

N HBM JESD22-A114E exceeds 2000 V

N MM JESD22-A115-A exceeds 200 V

I Multiple package options

I Specified from −40 °C to +85 °C and from −40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number Package

Temperature range

74HC02N

−40 °C to +125 °C

74HCT02N

74HC02D

−40 °C to +125 °C

74HCT02D

74HC02DB −40 °C to +125 °C

74HCT02DB

74HC02PW −40 °C to +125 °C

74HCT02PW

74HC02BQ −40 °C to +125 °C

74HCT02BQ

Name

DIP14

SO14

SSOP14

TSSOP14

DHVQFN14

Description

plastic dual in-line package; 14 leads (300 mil)

Version

SOT27-1

plastic small outline package; 14 leads; body width SOT108-1

3.9 mm

plastic shrink small outline package; 14 leads; body SOT337-1

width 5.3 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

plastic dual in-line compatible thermal enhanced very SOT762-1

thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

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