74HCT240PW-Q100 查看數據表（PDF） - NXP Semiconductors.
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74HCT240PW-Q100 Datasheet PDF : 16 Pages
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74HC240-Q100; 74HCT240-Q100
Octal buffer/line driver; 3-state; inverting
Rev. 1 — 30 July 2012
Product data sheet
1. General description
The 74HC240-Q100; 74HCT240-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-Power Schottky TTL (LSTTL).
The 74HC240-Q100; 74HCT240-Q100 is a dual octal inverting buffer/line driver with
3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and
2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Inverting 3-state outputs
Multiple package options
Complies with JEDEC standard no. 7 A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC240D-Q100
74HCT240D-Q100
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74HC240PW-Q100 40 C to +125 C
74HCT240PW-Q100
TSSOP20 plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
74HC240BQ-Q100 40 C to +125 C
74HCT240BQ-Q100
DHVQFN20 plastic dual-in-line compatible thermal enhanced SOT764-1
very thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
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