74HCT7080D 查看數據表（PDF） - Philips Electronics

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74HCT7080D

16-bit even/odd parity generator/checker

Philips Electronics 

Philips Semiconductors

16-bit even/odd parity

generator/checker

Product specification

74HC/HCT7080

FEATURES

• Word-length easily expanded by cascading

• Generates either even or odd parity for 16-data bits

• Output capability: standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT7080 are high-speed Si-gate CMOS

devices. They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT7080 are 16-bit parity generators or

checkers commonly used to detect errors in high-speed

data transmission or data retrieval systems.

The even and odd parity output is available for generating

or checking even/odd parity up to 16-bits.

The even/odd parity output (E/O) is HIGH when an even

number of data inputs (I0 to I15) are HIGH and the

cascade/even-odd-changing input (X) is HIGH.

Expansion to larger word sizes is accomplished by

connecting the even/odd parity output (E/O) to the

cascade/even-odd-changing input (X) of the final stage.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

SYMBOL PARAMETER

CONDITIONS

tPHL/ tPLH

CI

CPD

propagation delay

In to E/O

X to E/O

input capacitance

power dissipation capacitance per package

CL = 15 pF; VCC = 5 V

notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi + ∑ (CL ×VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

TYPICAL

UNIT

HC HCT

29 32 ns

12 15 ns

3.5 3.5 pF

24 25 pF

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

December 1990

2

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