74HC/HCT4516 查看數據表（PDF） - Philips Electronics
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74HC/HCT4516 Datasheet PDF : 14 Pages
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Philips Semiconductors
Binary up/down counter
Product specification
74HC/HCT4516
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
74HC
+25
−40 to+85
−40 to +125
UNIT
VCC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
trem
removal time
MR to CP
80 28
16 10
14 8
100
120
20
24
17
20
ns 2.0 Fig.10
4.5
6.0
trem
removal time
PL to CP
80 25
16 9
14 7
100
120
20
24
17
20
ns 2.0 Fig.10
4.5
6.0
tsu
set-up time
100 30
UP/DN to CP
20 11
17 9
125
150
25
30
21
26
ns 2.0 Fig.8
4.5
6.0
tsu
set-up time
CE to CP
100 19
20 7
17 6
125
150
25
30
21
26
ns 2.0 Fig.8
4.5
6.0
tsu
set-up time
Dn to PL
100 17
20 6
17 5
125
150
25
30
21
26
ns 2.0 Fig.11
4.5
6.0
th
hold time
50
5
5
CE to CP
50
5
5
50
5
5
ns 2.0 Fig.8
4.5
6.0
th
hold time
Dn to PL
3 −6
3
3
3 −2
3
3
3 −2
3
3
th
hold time
0 −19
0
0
UP/DN to CP
0 −7
0
0
0 −6
0
0
ns 2.0 Fig.11
4.5
6.0
ns 2.0 Fig.8
4.5
6.0
fmax
maximum clock pulse 6.0 16
4.8
4.0
frequency
30 49
24
20
35 58
28
24
MHz 2.0 Fig.7
4.5
6.0
December 1990
7
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