74HCT2G86DP(2014) 查看數據表（PDF） - NXP Semiconductors.
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74HCT2G86DP Datasheet PDF : 15 Pages
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NXP Semiconductors
13. Package outline
74HC2G86; 74HCT2G86
Dual 2-input EXCLUSIVE-OR gate
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2
D
c
y
Z
8
5
E
A
X
HE
vM A
pin 1 index
1
e
4
bp
wM
A A2
A1
(A3)
θ
Lp
L
detail X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1) E(1)
e
HE
mm
1.1
0.15
0.00
0.95
0.75
0.25
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT505-2
---
L
Lp
v
w
y
Z(1)
θ
0.5
0.47
0.33
0.2 0.13
0.1
0.70
0.35
8°
0°
EUROPEAN
PROJECTION
ISSUE DATE
02-01-16
Fig 8. Package outline SOT505-2 (TSSOP8)
74HC_HCT2G86
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 14 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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