74HCT193PW 查看數據表（PDF） - NXP Semiconductors.
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74HCT193PW Datasheet PDF : 30 Pages
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NXP Semiconductors
74HC193; 74HCT193
Presettable synchronous 4-bit binary up/down counter
5. Pinning information
5.1 Pinning
74HC193
74HCT193
D1 1
Q1 2
Q0 3
CPD 4
CPU 5
Q2 6
Q3 7
GND 8
16 VCC
15 D0
14 MR
13 TCD
12 TCU
11 PL
10 D2
9 D3
001aag406
Fig 5. Pin configuration SO16
74HC193
74HCT193
D1 1
Q1 2
Q0 3
CPD 4
CPU 5
Q2 6
Q3 7
GND 8
74HC193
74HCT193
16 VCC
15 D0
14 MR
13 TCD
12 TCU
11 PL
10 D2
9 D3
001aag407
D1 1
Q1 2
Q0 3
CPD 4
CPU 5
Q2 6
Q3 7
GND 8
16 VCC
15 D0
14 MR
13 TCD
12 TCU
11 PL
10 D2
9 D3
001aaf408
Fig 6. Pin configuration TSSOP16 Fig 7. Pin configuration DIP16
and SSOP16
5.2 Pin description
Table 2.
Symbol
D0
D1
D2
D3
Q0
Q1
Q2
Q3
CPD
CPU
GND
PL
TCU
TCD
MR
VCC
Pin description
Pin
15
1
10
9
3
2
6
7
4
5
8
11
12
13
14
16
[1] LOW-to-HIGH, edge triggered.
Description
data input 0
data input 1
data input 2
data input 3
flip-flop output 0
flip-flop output 1
flip-flop output 2
flip-flop output 3
count down clock input[1]
count up clock input[1]
ground (0 V)
asynchronous parallel load input (active LOW)
terminal count up (carry) output (active LOW)
terminal count down (borrow) output (active LOW)
asynchronous master reset input (active HIGH)
supply voltage
74HC_HCT193
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 24 June 2013
© NXP B.V. 2013. All rights reserved.
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