74HCT73 查看數據表（PDF） - Philips Electronics
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74HCT73 Datasheet PDF : 21 Pages
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Philips Semiconductors
74HC73
Dual JK flip-flop with reset; negative-edge trigger
Table 8: Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 8.
Symbol Parameter
Conditions
Min
Typ
Max Unit
th
hold time nJ, nK to nCP
see Figure 6
VCC = 2.0 V
3
−8
-
VCC = 4.5 V
3
−3
-
VCC = 6.0 V
3
−2
-
fmax
maximum clock frequency
see Figure 6
VCC = 2.0 V
6.0
23
-
VCC = 4.5 V
30
70
-
VCC = 6.0 V
35
83
-
VCC = 5.0 V; CL = 15 pF
-
77
-
CPD
power dissipation capacitance per VI = GND to VCC
flip-flop
[1] -
30
-
ns
ns
ns
MHz
MHz
MHz
MHz
pF
Tamb = −40 °C to +85 °C
tPHL, tPLH propagation delay nCP to nQ
propagation delay nCP to nQ
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
-
-
200
ns
-
-
40
ns
-
-
34
ns
propagation delay nR to nQ, nQ
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
-
-
200
ns
-
-
40
ns
-
-
34
ns
tTHL, tTLH
tW
output transition time
nCP clock pulse width HIGH or LOW
nR reset pulse width HIGH or LOW
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
-
-
-
-
-
-
-
-
-
-
-
-
100
-
20
-
17
-
180
ns
36
ns
31
ns
95
ns
19
ns
16
ns
-
ns
-
ns
-
ns
trem
removal time nR to nCP
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
100
-
-
ns
20
-
-
ns
17
-
-
ns
100
-
-
ns
20
-
-
ns
17
-
-
ns
9397 750 13815
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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