DM74LS73AM 查看數據表（PDF） - Fairchild Semiconductor
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DM74LS73AM
Fairchild Semiconductor
DM74LS73AM Datasheet PDF : 5 Pages
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Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Typ
Min
Max
(Note 5)
Units
VI
Input Clamp Voltage
VOH
HIGH Level
Output Voltage
VOL
LOW Level
Output Voltage
II
Input Current @ Max
Input Voltage
VCC = Min, II = −18 mA
VCC = Min, IOH = Max
VIL = Max, VIH = Min
VCC = Min, IOL = Max
VIL = Max, VIH = Min
IOL = 4 mA, VCC = Min
VCC = Max
VI = 7V
J, K
Clear
Clock
−1.5
V
2.7
3.4
V
0.35
0.5
V
0.25
0.4
0.1
0.3
mA
0.4
IIH
HIGH Level
Input Current
VCC = Max
VI = 2.7V
J, K
Clear
Clock
20
60
µA
80
IIL
LOW Level
Input Current
VCC = Max
VI = 0.4V
J, K
Clear
Clock
−0.4
−0.8
mA
−0.8
IOS
Short Circuit Output Current
ICC
Supply Current
Note 5: All typicals are at VCC = 5V, TA = 25°C.
VCC = Max (Note 6)
VCC = Max (Note 7)
−20
−100
mA
4
6
mA
Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs,
where shorting the outputs to ground may cause the outputs to change logic state, an equivalent test may be performed where VO = 2.125V with the mini-
mum and maximum limits reduced by one half from their stated values. This is very useful when using automatic test equipment.
Note 7: With all outputs OPEN, ICC is measured with the Q and Q outputs HIGH in turn. At the time of measurement, the clock is grounded.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
From (Input)
To (Output)
fMAX
tPHL
tPLH
tPLH
tPHL
Maximum Clock Frequency
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Clear
to Q
Clear
to Q
Clock to
Q or Q
Clock to
Q or Q
RL = 2 kΩ
CL = 15 pF
CL = 50 pF
Min
Max
Min
Max
30
25
20
28
20
24
20
24
20
28
Units
MHz
ns
ns
ns
ns
3
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