74LVC1G175 查看數據表（PDF） - Philips Electronics
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74LVC1G175 Datasheet PDF : 17 Pages
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Philips Semiconductors
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
tPHL, tPLH propagation delay
CP to Q
CL = 50 pF; VCC = 3.3 V
1.0 3.1 5.7 ns
propagation delay
MR to Q
CL = 50 pF; VCC = 3.3 V
1.0 2.5 5.8 ns
fmax
maximum clock
CL = 50 pF; VCC = 3.3 V
frequency
175 300 -
MHz
CI
input capacitance
CPD
power dissipation VCC = 3.3 V
capacitance
-
2.5 -
pF
[1] [2] -
14
-
pF
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[2] The condition is VI = GND to VCC.
4. Ordering information
Table 2: Ordering information
Type number
Package
Temperature range Name
74LVC1G175GW −40 °C to +125 °C SC-88
74LVC1G175GV
−40 °C to +125 °C SC-74
74LVC1G175GM −40 °C to +125 °C XSON6
Description
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
plastic extremely thin small outline package; no
leads; 6 terminals; body 1 × 1.45 × 0.5 mm
5. Functional diagram
Version
SOT363
SOT457
SOT886
6
MR
3
D
FF Q
4
1
CP
001aaa468
Fig 1. Logic symbol.
1
C1
3
1D
4
6
R
001aaa469
Fig 2. IEC logic symbol.
9397 750 13762
Product data sheet
Rev. 01 — 18 October 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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