PCF85116-3T/01 查看數據表（PDF） - Philips Electronics
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PCF85116-3T/01 Datasheet PDF : 21 Pages
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Philips Semiconductors
PCF85116-3
2048 × 8-bit CMOS EEPROM with I2C-bus interface
After the receipt of each data byte, the six high-order bits of the memory address
providing access to one of the 64 pages of the memory remain unchanged. The five
low-order bits of the memory address will be incremented only (see Figure 4). By
these five bits a single byte within the page in access is selected. By an increment the
memory address may change from 31 to 0, from 63 to 32, etc. If the master transmits
more than 32 bytes prior to generating the STOP condition, data within the addressed
page may be overwritten and unpredictable results may occur. As in the byte write
operation, all inputs are disabled until completion of the internal write cycles.
read: auto increment
B3 B2 B1
WORD ADDRESS
write: unchanged
write: auto increment
002aaa288
Fig 4. Auto-increment of memory address.
Remark: Write accesses to the EEPROM are enabled if the pin WP is LOW. When
WP is HIGH the EEPROM is write-protected and no acknowledge will be given by the
PCF85116-3 when data is sent. However, an acknowledge will be given after the
slave address and the word address.
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
S
1 0 1 0 B3 B2 B1 0 A
WORD ADDRESS
A
DATA
A
DATA
A
P
SLAVE ADDRESS
R/W
Fig 5. Auto increment memory address; two byte write.
auto increment
word address
auto increment
word address
=== '
9397 750 14217
Product data
Rev. 04 — 25 October 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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