74V1G125S 查看數據表（PDF） - STMicroelectronics

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74V1G125S

SINGLE BUS BUFFER (3-STATE)

STMicroelectronics 

®

74V1G125

SINGLE BUS BUFFER (3-STATE)

s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 1 µA (MAX.) at TA = 25 oC

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 5.5V

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V1G125 is an advanced high-speed

CMOS SINGLE BUS BUFFER fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS technology.

S

(SOT23-5L)

C

(SC-70)

ORDER CODE:

74V1G125S

3-STATE control input G has to be set high to

place the output into the high impedance state.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

PIN CONNECTION AND IEC LOGIC SYMBOLS

October 1999

1/8

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