SY100S834ZITR(1999) 查看數據表（PDF） - Micrel
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SY100S834ZITR Datasheet PDF : 4 Pages
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Micrel
TIMING DIAGRAM
CLK
FSEL = 0
Q0
Q1
Q2
FSEL = 1
Q0
Q1
Q2
EN
Internal Clock
Disabled
ClockWorks™
SY100S834
SY100S834L
The EN signal will freeze the internal clocks to the flip-flops on the first falling edge of CLK after its assertion. The internal dividers will maintain
their state during the internal clock freeze and will return to clocking once the internal clocks are unfrozen. The outputs will transition to their
next states in the same manner, time and relationship as they would have had the EN signal not been asserted.
PRODUCT ORDERING CODE
Ordering
Code
SY100S834ZC
SY100S834ZCTR
SY100S834LZC
SY100S834LZCTR
Package
Type
Z16-2
Z16-2
Z16-2
Z16-2
Operating
Range
Commercial
Commercial
Commercial
Commercial
VEE Range
(V)
-4.2 to -5.5
-4.2 to -5.5
-3.0 to -3.8
-3.0 to -3.8
Ordering
Code
SY100S834ZI
SY100S834ZITR
SY100S834LZI
SY100S834LZITR
Package
Type
Z16-2
Z16-2
Z16-2
Z16-2
Operating
Range
Industrial
Industrial
Industrial
Industrial
VEE Range
(V)
-4.2 to -5.5
-4.2 to -5.5
-3.0 to -3.8
-3.0 to -3.8
3
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