PS21205 查看數據表（PDF） - MITSUBISHI ELECTRIC
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PS21205 Datasheet PDF : 8 Pages
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MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21205
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 8 TYPICAL DIP-IPM APPLICATION CIRCUIT EXAMPLE
For detailed description of the boot-strap circuit
construction, please contact Mitsubishi Electric
5V line
C1: Tight to lerance temp-compensated electrolytic type; C2,C3: 0.22~2 µ F R-category ceramic capacitor for noise filtering
(Note : The capacitance value depends on the PWM control used in the applied system)
C2 VUFB
C1 VUFS
DIP-IPM
P
VP1
C3
UP
VCC
VB
IN
HO
C2
U
COM VS
VVFB
C1 VVFS
C
P
U
U
N
I
T
5V line
VP1
C3
VP
C2
VWFB
C1 VWFS
VP1
C3
WP
VPC
VCC
VB
IN
HO
COM VS
VCC
VB
IN
HO
COM VS
C3 VN1
VCC
UOUT
VOUT
V
M
W
15V line
UN
VN
WN
Fo
VNC
UN
VN
WN
Fo
GND
WOUT
VNO
CIN
CFO
CFO
CIN
N
C
C4(CFO)
A
B R1
C5
Shunt
Resistor RSh
N1
Note 1 : To prevent the input signals oscillation, an RC coupling at each input is recommended, and the wiring of each input should be as short
as possible. (Less than 2cm)
2 : By virtue of integrating an application specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler
or transformer isolation is possible.
3 : FO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately
5.1kΩ resistance.
4 : FO output pulse width should be decided by connecting an external capacitor between CFO and VNC terminals (CFO). (Example : CFO
= 22 nF → tFO = 1.8 ms (typ.))
5 : Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ resistance (other RC coupling circuits at
each input may be needed depending on the PWM control scheme used and on the wiring impedances of the system’s printed circuit
board). Approximately a 0.22~2µF by-pass capacitor should be used across each power supply connection terminals.
6 : To prevent errors of the protection function, the wiring of A, B, C should be as short as possible.
7 : In the recommended protection circuit, please select the R1C5 time constant in the range 1.5~2µs.
8 : Each capacitor should be put as nearby the pins of the DIP-IPM as possible.
9 : To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 pins should be as short as possible. Approxi-
mately a 0.1~0.22µF snubber capacitor between the P&N1 pins is recommended.
Aug. 1999
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