7545 查看數據表（PDF） - Renesas Electronics

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7545

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Renesas Electronics 

7545 Group

Table 1 Performance overview (1)

Parameter

Number of basic instructions

Instruction execution time

Memory sizes ROM

M37545G1

M37545G2

M37545G4

M37545G6

M37545G8

M37545GC

M37545GF

RAM

M37545G1/G2

M37545G4/G6/G8/GC/GF

I/O port

P00−P07 I/O

P10, P11 I/O (RLSS-only pin)

P20−P27 I/O

P30−P37 I/O

P40, P41 I/O (RLSS-only pin)

P42

I/O

Timer

Timer 1

Timer 2

Timer 3

Carrier wave generating circuit

Watchdog timer

Power-on reset circuit

Voltage drop detection circuit (Not available for RLSS)

Interrupt

Source

Function set Function set ROM

ROM area

ROM code protect

Device structure

Package

Operating temperature range

Power source f(XIN) = 4 MHz

voltage

Function

71

2.00 µs (Minimum instruction)

4096 bytes × 8 bits

8192 bytes × 8 bits

16384 bytes × 8 bits

24576 bytes × 8 bits

32768 bytes × 8 bits

49152 bytes × 8 bits

61440 bytes × 8 bits

RAM1: 240 bytes × 8 bits, RAM2: 16 bytes × 8 bits

RAM1: 384 bytes × 8 bits, RAM2: 128 bytes × 8 bits

• 1-bit × 8

• CMOS compatible input level

• CMOS 3-state output structure

• Whether the pull-up function/key-on wakeup function is to be used or not

can be determined by program.

• 1-bit × 2

• CMOS compatible input level

• The output structure can be switched to N-channel open-drain or CMOS by software.

• 1-bit × 8

• CMOS compatible input level

• The output structure can be switched to N-channel open-drain or CMOS by software.

• P2 can output a large current for driving LED.

• P20 and P21 are also used as INT0 and INT1, respectively.

• 1-bit × 8

• CMOS compatible input level

• The output structure can be switched to N-channel open-drain or CMOS by software.

• 1-bit × 2

• CMOS compatible input level

• CMOS 3-state output structure

• 1-bit × 1

• CMOS compatible input level

• CMOS 3-state output structure

• Carrier wave output pin for remote-control transmitter

8-bit timer with timer 1 latch

Count source is Prescaler output.

8-bit timer with timer 2 primary latch and timer 2 secondary latch

Count source can be selected from f(XIN)/16, f(XIN)/8, f(XIN)/2 or f(XIN)/1.

8-bit timer with timer 3 latch

Count source can be selected from f(XIN)/16, f(XIN)/8 or f(XIN)/2 or carrier wave output.

Remote-control waveform is generated by using timer 2 and timer 3.

455 kHz carrier wave generating mode is available.

16-bit × 1

Built-in

Typ. 1.75 V (Ta=25 °C)

7 sources (External × 3, Timer × 3, Software)

Function set ROM is assigned to address FFDA16.

Enable/disable of watchdog timer and STP instruction can be selected.

Valid/invaid of voltage drop detection circuit can be selected.

ROM code protect is assigned to address FFDB16.

Read/write the built-in QzROM by serial programmer is disabled by setting

“00” to ROM code protect.

CMOS silicon gate

32-pin plastic molded LQFP (PLQP0032GB-A)

32-pin plastic molded SSOP (PLSP0032JB-A)

−20 to 85 °C

1.8 to 3.6 V

Rev.1.06 Mar 07, 2008 Page 3 of 59

REJ03B0140-0106

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