HUFA75321D3T 查看數據表（PDF） - Fairchild Semiconductor
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HUFA75321D3T Datasheet PDF : 10 Pages
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HUFA75321D3, HUFA75321D3S
SABER Electrical Model
REV April 1998
template HUFA75321d n2, n1, n3
electrical n2, n1, n3
{
var i iscl
d..model dbodymod = (is = 7.47e-13, cjo = 1.02e-9, tt = 3.21e-8, m = 0.5)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 9e-10, is = 1e-30, n = 10, m = 0.85)
m..model mmedmod = (type=_n, vto = 3.25, kp = 1.75, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 3.65, kp = 32, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 2.91, kp = 0.07, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -7.85, voff = -4.85)
sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -4.85, voff = -7.85)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0, voff = 3.0)
DPLCAP
10
RSLC2
5
RSLC1
51
ISCL
RDBREAK
72
LDRAIN
DRAIN
2
RLDRAIN
RDBODY
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 3.0, voff = 0)
c.ca n12 n8 = 9.96e-10
c.cb n15 n14 = 9.83e-10
c.cin n6 n8 = 6.18e-10
-
ESG
6
8
+
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
LGATE
EVTEMP
GATE
1
RGATE + 18 - 6
9
20 22
RLGATE
l.ldrain n2 n5 = 1e-9
EVTHRES
+ 19 -
8
CIN
50
RDRAIN
16
21
DBREAK
11
MWEAK
MMED
MSTRO
8
EBREAK
+
17
18
-
7
71
DBODY
LSOURCE
SOURCE
3
l.lgate n1 n9 =3.57e-9
l.lsource n3 n7 = 4.25e-9
RSOURCE
RLSOURCE
m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u
S1A
12 13
8
S1B
S2A
14
15
13
S2B
RBREAK
17
18
RVTEMP
res.rbreak n17 n18 = 1, tc1 = 1.05e-3, tc2 = 1.21e-7
CA
res.rdbody n71 n5 = 6.45e-3, tc1 = 2.01e-3, tc2 = 1.21e-6
res.rdbreak n72 n5 = 2.01e-1, tc1 = 3.62e-3, tc2 = 6.01e-7
res.rdrain n50 n16 = 5.5e-3, tc1 = 2.4e-2, tc2 = 1.02e-6
res.rgate n9 n20 = 2.25
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 35.7
res.rlsource n3 n7 = 42.5
13
+
EGS
6
8
-
CB
+ 14
EDS
5
8
-
19
IT
-
VBAT
+
8
22
RVTHRES
res.rslc1 n5 n51 = 1e-6, tc1 = 2.07e-4, tc2 = 4.67e-5
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 16.3e-3, tc1 = 0, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -1.96e-3, tc2 = 1.39e-6
res.rvthres n22 n8 = 1, tc1 = -3.01e-3, tc2 = -8.85e-6
spe.ebreak n11 n7 n17 n18 = 59.54
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc = 1
equations {
i (n51->n50) + = iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/101))** 2.5))
}
}
©2001 Fairchild Semiconductor Corporation
HUFA75321D3, HUFA75321D3S Rev. B
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