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78P2342JAT-IGT 查看數據表(PDF) - Teridian Semiconductor Corporation

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78P2342JAT-IGT
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
78P2342JAT-IGT Datasheet PDF : 36 Pages
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LOCAL LOOPBACK AND REDUNDANCY MUX
Each receiver has a 4-input MUX as shown in the
adjacent figure. In multiport applications where
redundant channels are required, the receiver MUX
can be configured to provide the necessary
multiplexing functions. This allows the user to use
one port as a redundant monitor for the other port.
The tables below show the register settings for
selecting the desired receiver input source.
LLBKA
(Port 1)
0
0
1
1
LLBKB
(Port 1)
0
1
0
1
Receiver #1 Input
Source
LINP1/LINN1
LOUTP1/LOUTN1
LINP2/LINN2
LOUTP2/LOUTN2
LLBKA
(Port 2)
0
0
1
1
LLBKB
(Port 2)
0
1
0
1
Receiver #2 Input
Source
LINP2/LINN2
LOUTP2/LOUTN2
LINP1/LINN1
LOUTP1/LOUTN1
Note: The LLBKA and LLBKB bits are located in the
Mode Control Register (MDCR). The Register
Control bit, REGEN, should be enabled when using
the register settings to avoid conflict with external
loopback setting pins.
78P2342JAT
2-port E3/DS3/STS-1 LIU
with Jitter Attenuator
LOUTP1, LOUTN1
LINP1, LINN1
Transmitter
#1
00
01
Receiver
10
#1
11
LOUTP2, LOUTN2
LINP2, LINN2
LLBKA,B(1)
00
01
10
11
Transmitter
#2
Receiver
#2
LLBKA,B(2)
When serial interface control is not available, the
respective LPBKx pin for each of the channels can
also be used to activate local loopback mode as
shown below. Note that redundant channel modes
can only be activated using the serial interface.
LPBKx
pin
L
Z
H
Loopback Mode
Normal Operation
Same as LLBKA,B = ‘00’
Remote (Digital) Loopback
Same as RLBK = ‘1’
Local (Analog) Loopback
Same as LLBKA,B = ‘01’
Page 3 of 36
2005 Teridian Semiconductor Corporation
Rev 2.2

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