A25L05P 查看數據表（PDF） - AMIC Technology

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A25L05P

2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

AMIC Technology 

A25L20P MEMORY ORGANIZATION

The memory is organized as:

„ 262,144 bytes (8 bits each)

„ 4 sectors (one (4/4/8/16/32) Kbytes & 64x3 Kbytes

„ 1024 pages (256 bytes each).

Table 2. Memory Organization

A25L20P Top Boot Block Address Table

Sector

Sector Size (Kbytes)

3-4

4

3-3

4

3-2

8

3-1

16

3-0

32

2

64

1

64

0

64

A25L20P Bottom Boot Block Address Table

Sector

Sector Size (Kbytes)

3

64

2

64

1

64

0-4

32

0-3

16

0-2

8

0-1

4

0-0

4

A25L20P/A25L10P/A25L05P Series

Each page can be individually programmed (bits are

programmed from 1 to 0). The device is Sector or Bulk

Erasable (bits are erased from 0 to 1) but not Page Erasable.

3F000h

3E000h

3C000h

38000h

30000h

20000h

10000h

00000h

Address Range

3FFFFh

3EFFFh

3DFFFh

3BFFFh

37FFFh

2FFFFh

1FFFFh

0FFFFh

30000h

20000h

10000h

08000h

04000h

02000h

01000h

00000h

Address Range

3FFFFh

2FFFFh

1FFFFh

0FFFFh

07FFFh

03FFFh

01FFFh

00FFFh

(August, 2007, Version 1.0)

8

AMIC Technology Corp.

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