A3968SLB(1998) 查看數據表（PDF） - Allegro MicroSystems

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A3968SLB
(Rev.:1998)

DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE

Allegro MicroSystems 

3968

DUAL FULL-BRIDGE

PWM MOTOR DRIVER

WITH BRAKE

VESLE=C0TVR,IC56AkLΩC&HA6R80ACpFTERRCIStoTIGCrSoautnTdA(=un+l2e5s°sCn, oVtBeBd=o3th0eVrw, VisCeC)

= 4.75 V

(cont.)

to

5.5

V,

VREF

=

2

V,

Characteristic

Control Logic (continued)

PWM RC Frequency

PWM Propagation Delay Time

Cross-Over Dead Time

Propagation Delay Times

Thermal Shutdown Temp.

Thermal Shutdown Hysteresis

UVLO Enable Threshold

UVLO Hysteresis

Logic Supply Current

Symbol

fosc

tPWM

tcodt

tpd

TJ

∆TJ

VT(UVLO)+

VT(UVLO)hys

ICC(ON)

ICC(OFF)

ICC(BRAKE)

Test Conditions

CT = 680 pF, RT = 56 kΩ

Comparator Trip to Source OFF

Cycle Reset to Source ON

1 kΩ Load to 25 V

IOUT = ±650 mA, 50% to 90%:

Disable OFF to Source ON

Disable ON to Source OFF

Disable OFF to Sink ON

Disable ON to Sink OFF

Brake Enable to Sink ON

Brake Enable to Source OFF

Increasing VCC

Both bridges ON (forward or reverse)

All INPUTs = 2.4 V

All INPUTs = 0.8 V

Min.

Limits

Typ. Max.

Units

22.9

25.4

27.9

kHz

—

1.0

1.4

µs

—

0.8

1.2

µs

0.2

1.8

3.0

µs

—

100

—

ns

—

500

—

ns

—

200

—

ns

—

200

—

ns

—

2200

—

ns

—

200

—

ns

—

165

—

°C

—

15

—

°C

—

4.1

4.6

V

0.1

0.6

—

V

—

—

50

mA

—

—

9.0

mA

—

—

95

mA

NOTES:1. Typical Data is for design information only.

2. Negative current is defined as coming out of (sourcing) the specified device terminal.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

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