5962-9755701EPC 查看數據表（PDF） - Avago Technologies
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5962-9755701EPC Datasheet PDF : 16 Pages
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10.0
VDD1 = 5 V
VDD2 = 5 V
9.5 VIN– = 0 V
9.0
20
IDD1 VDD1 = 5 V
IDD2 VDD2 = 5 V
15
VIN+ = 320 mV
VIN– = 0 V
10
8.5
5
8.0
-0.4
TA = 25° C
-0.2
0
0.2
0.4
VIN+ – INPUT VOLTAGE – V
0
-60
-20
20
60
100
140
TA – TEMPERATURE – °C
Figure 15. Output Supply Current vs. Input Voltage.
Figure 17. Input and Output Supply Current vs. Temperature.
10 K
78L05
IN OUT
VDD2
150 pF
+15 V
0.1
0.1
1
PF
PF
2
8
0.1 PF
7
2K
0.1 PF
–
9V
HCPL-7850
3
6
2K
+ MC34081
VOUT
4
5
0.1 PF
10 K
PULSE GEN.
+
–
VCM
150
pF
-15 V
Figure 16. Common Mode Rejection Test Circuit.
10 K
VDD1
VDD2
+15 V
0.1 PF
0.1 PF
1
8
0.1 PF
VIN
0.01 PF
2
7
HCPL-7850
3
6
2K
–
2K
+ MC34081
VOUT
4
5
0.1 PF
10 K
-15 V
VIN IMPEDANCE LESS THAN 10 :.
Figure 18. Propagation Delay, Rise/Fall Time and Bandwidth Test Circuit.
10
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