HCPL-7851-100 查看數據表（PDF） - Avago Technologies
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HCPL-7851-100 Datasheet PDF : 16 Pages
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VDD1
0.1 PF
1
2
HCPL-7850
3
4
VDD2
8
0.1 PF
7
10 K
6
10 K
5
0.47
PF
Figure 1. Input Offset Voltage Test Circuit.
+15 V
0.1 PF
+
VOUT
– AD624CD
GAIN = 100
0.47 0.1 PF
PF
-15 V
2.0
VDD1 = 5 V
1.5 VDD2 = 5 V
1.0
0.5
0
-0.5
-60
-20
20
60
100
TA – TEMPERATURE – °C
Figure 2. Input Offset Change vs. Temperature.
0.9
vs. VDD1 (VDD2 = 5 V)
vs. VDD2 (VDD1 = 5 V)
0.6
TA = 25° C
0.3
0
-0.3
140
4.4
4.6
4.8
5.0
5.2
5.4
5.6
VDD – SUPPLY VOLTAGE – V
Figure 3. Input Offset Change vs. VDD1 and VDD2.
4.0
3.5
NEGATIVE
3.0
OUTPUT
POSITIVE
OUTPUT
2.5
2.0
1.5
VDD1 = 5 V
VDD2 = 5 V
TA = 25° C
1.0
-0.6 -0.4 -0.2
0
0.2
0.4 0.6
VIN – INPUT VOLTAGE – V
Figure 4. Output Voltages vs. Input Voltage.
7
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