AD1882A 查看數據表（PDF） - Analog Devices
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AD1882A Datasheet PDF : 20 Pages
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AD1882A
Parameter
DM_DATA
Input Signal High (VIH)
Input Signal Low (VIL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
S/PDIF_OUT
Output Signal High (VOH)
Output Signal Low (VOL)
IOUT = –500 μA
IOUT = +1500 μA
POWER SUPPLY
Analog (AVDD) 3.3 V ± 5%
Power Supply Range
Power Dissipation
Supply Current
Digital (DVDD) 3.3 V ± 10%
Power Supply Range
Power Dissipation
Supply Current
Digital I/O (DVIO) 3.3 V ± 10%
Power Supply Range
Power Dissipation
Supply Current
Digital I/O (DVIO) 1.5 V ± 5.5%
Power Supply Range
Power Dissipation
Supply Current
Digital GPIO (DVGPIO) 3.3 V ± 10%
Power Supply Range
Power Dissipation
Supply Current
Power Supply Rejection (100 mV p-p Signal @ 1 kHz)1
1 Guaranteed but not tested.
2 Measurements reflect main ADC.
3 RMS values assume sine wave input.
Min
Typ
DVGPIO × 0.60
0
–150
–50
DVGPIO × 0.72
0
Max
DVGPIO
DVGPIO × 0.24
DVGPIO
DVGPIO × 0.10
Unit
V
V
nA
nA
V
V
3.13
3.30
3.46
V
116
mW
35
mA
2.97
3.30
3.63
V
162
mW
49
mA
2.97
3.30
3.63
V
3.96
mW
1.20
mA
2.97
3.30
3.63
V
3.96
mW
1.20
mA
2.97
3.30
3.63
V
3.63
mW
1.10
mA
80
dB
HD AUDIO LINK SPECIFICATIONS
HD Audio signals comply with the High Definition Audio spec-
ifications. Please refer to these specifications at:
http://www.intel.com/standards/hdaudio/
POWER-DOWN STATES
Table 5. Power-Down States
Parameter
Function Node In D0, All Nodes Active
Function Node in D3
Codec in RESET
Individual Block Power Savings
DAC Pair Powered Down Saves (Each)
ADC Pair Powered Down Saves (Each)
Mixer Power Control (and Associated Amps) Saves
MIC_BIAS Powered Down Saves1
IDVDD Typ
IAVDD Typ
Unit
49
35
mA
16
0.7
mA
3
3
mA
6
6
mA
5
4.4
mA
0
3
mA
0
1.0
mA
1 Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits, setting them to the high-Z state.
Rev. 0 | Page 6 of 20 | August 2008
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