AD1940 查看數據表（PDF） - Analog Devices
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AD1940 Datasheet PDF : 36 Pages
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AD1940/AD1941
Pin No.
AD1940 AD1941
22
19
20
23
23
26
26
27
27
28, 33, 40 28, 33, 40
29
29
30
30
31
31
32
32
34
34
35
35
38
38
39
39
41
41
42
42
43
43
44
44
45
45
46
46
47
47
I/O
IN
IN/OUT
IN
IN
IN/OUT
IN/OUT
OUT
OUT
OUT
OUT
IN/OUT
IN/OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
Mnemonic
CDATA
SDA
SCL
RESETB
LRCLK_OUT0
BCLK_OUT0
ODVDD
SDATA_OUT0/TDM_O0
SDATA_OUT1
SDATA_OUT2
SDATA_OUT3
LRCLK_OUT1
BCLK_OUT1
SDATA_OUT4/TDM_O1
SDATA_OUT5
SDATA_OUT6
SDATA_OUT7/DCSOUT
INVDD
VSUPPLY
VSENSE
VDRIVE
VREF
Description
Data Input for SPI.
I2C Serial Data I/O.
I2C Clock.
Reset the AD1940/AD1941.
Left/Right Clock Output 0.
Bit Clock Output 0.
Power Connection for Output Pins.
Serial Data Output 0/TDM (16- or 8-Channel) Output 0.
Serial Data Output 1.
Serial Data Output 2.
Serial Data Output 3.
Left/Right Clock Output 1.
Bit Clock Output 1.
Serial Data Output 4./TDM (8-Channel) Output 1.
Serial Data Output 5.
Serial Data Output 6.
Serial Data Output 7/Data Capture Output.
Input Voltage Reference.
Voltage Level Input to Regulator. Usually 3.3 V or 5 V.
Digital Power Level. Should be tied to VDD.
Drive for External PNP Transistor.
Reference Level for Voltage Regulator.
Rev. A | Page 10 of 36
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