AD5122ABRUZ100 查看數據表（PDF） - Analog Devices
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AD5122ABRUZ100 Datasheet PDF : 32 Pages
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Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Parameter
VDD to GND
VSS to GND
VDD to VSS
VLOGIC to GND
VA, VW, VB to GND
IA, IW, IB
Pulsed1
Frequency > 10 kHz
RAW = 10 kΩ
RAW = 100 kΩ
Frequency ≤ 10 kHz
RAW = 10 kΩ
RAW = 100 kΩ
Digital Inputs
Operating Temperature Range, TA3
Maximum Junction Temperature,
TJ Maximum
Storage Temperature Range
Reflow Soldering
Peak Temperature
Time at Peak Temperature
Package Power Dissipation
ESD4
FICDM
Rating
−0.3 V to +7.0 V
+0.3 V to −7.0 V
7V
−0.3 V to VDD + 0.3 V or
+7.0 V (whichever is less)
VSS − 0.3 V, VDD + 0.3 V
+7.0 V (whichever is less)
±6 mA/d2
±1.5 mA/d2
±6 mA/√d2
±1.5 mA/√d2
−0.3 V to VLOGIC + 0.3 V or
+7 V (whichever is less)
−40°C to +125°C
150°C
−65°C to +150°C
260°C
20 sec to 40 sec
(TJ max − TA)/θJA
4 kV
1.5 kV
1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2 d = pulse duty factor.
3 Includes programming of EEPROM memory.
4 Human body model (HBM) classification.
AD5122A/AD5142A
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is defined by the JEDEC JESD51 standard, and the value is
dependent on the test board and test environment.
Table 6. Thermal Resistance
Package Type
θJA
θJC
16-Lead LFCSP
89.51
3
16-Lead TSSOP
150.41 27.6
1 JEDEC 2S2P test board, still air (0 m/sec airflow).
Unit
°C/W
°C/W
ESD CAUTION
Rev. A | Page 11 of 32
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