AD5245(Rev0) 查看數據表（PDF） - Analog Devices
零件编号
产品描述 (功能)
生产厂家
AD5245 Datasheet PDF : 16 Pages
| |||
AD5245
TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS
(VDD = +5V ± 10%, or +3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.)
Table 3.
Parameter
Symbol Conditions
I2C INTERFACE TIMING CHARACTERISTICS6, 10 (Specifications Apply to All Parts)
SCL Clock Frequency
fSCL
tBUF Bus Free Time between STOP and START
t1
tHD;STA Hold Time (Repeated START)
t2
After this period, the first clock pulse is
generated.
tLOW Low Period of SCL Clock
t3
tHIGH High Period of SCL Clock
t4
tSU;STA Setup Time for Repeated START Condition t5
tHD;DAT Data Hold Time
t6
tSU;DAT Data Setup Time
t7
tF Fall Time of Both SDA and SCL Signals
t8
tR Rise Time of Both SDA and SCL Signals
t9
tSU;STO Setup Time for STOP Condition
t10
Min Typ1 Max Unit
400 kHz
1.3
µs
0.6
µs
1.3
µs
0.6
50 µs
0.6
µs
0.9 µs
100
ns
300 ns
300 ns
0.6
µs
NOTES
1 Typical specifications represent average readings at +25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, Wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9 All dynamic characteristics use VDD = 5 V.
10 See timing diagrams for locations of measured values.
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C, unless otherwise noted.)
Table 4.
Parameter
Value
VDD to GND
–0.3 V to +7 V
VA, VB, VW to GND
VDD
IMAX1
±20 mA
Digital Inputs and Output Voltage to GND 0 V to +7 V
Operating Temperature Range
–40°C to +125°C
Maximum Junction Temperature (TJMAX) 150°C
Storage Temperature
–65°C to +150°C
Lead Temperature (Soldering, 10 sec)
300°C
Thermal Resistance2 θJA: MSOP-10
230°C/W
NOTES
1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2 Package power dissipation = (TJMAX – TA)/θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 16
Share Link: 