AD5245 查看數據表（PDF） - Analog Devices
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AD5245 Datasheet PDF : 20 Pages
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AD5245
10 kΩ, 50 kΩ, 100 kΩ VERSIONS
VDD = 5 V ± 10% or 3 V ± 10%, VA = VDD, VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
R-DNL
R-INL
∆RAB
(∆RAB/RAB)/∆T × 106
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
VAB = VDD, wiper = no connect
Wiper Resistance
RW
VDD = 5 V
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Differential Nonlinearity4
DNL
Integral Nonlinearity4
INL
Voltage Divider Temperature Coefficient (∆VW/VW)/∆T × 106 Code = 0x80
Full-Scale Error
VWFSE
Code = 0xFF
Zero-Scale Error
VWZSE
Code = 0x00
RESISTOR TERMINALS
Voltage Range5
Capacitance A, B6
VA, VB, VW
CA, CB
f = 1 MHz, measured to GND,
code = 0x80
Capacitance W6
CW
f = 1 MHz, measured to GND,
code = 0x80
Shutdown Supply Current
IA_SD
VDD = 5.5 V
Common-Mode Leakage
ICM
VA = VB = VDD/2
DIGITAL INPUTS AND OUTPUTS
Input Logic High
VIH
VDD = 5 V
Input Logic Low
VIL
VDD = 5 V
Input Logic High
VIH
VDD = 3 V
Input Logic Low
VIL
VDD = 3 V
Input Current
Input Capacitance6
IIL
VIN = 0 V or 5 V
CIL
POWER SUPPLIES
Power Supply Range
VDD RANGE
Supply Current
Power Dissipation7
IDD
VIH = 5 V or VIL = 0 V
PDISS
VIH = 5 V or VIL = 0 V, VDD = 5 V
Power Supply Sensitivity
PSS
VDD = 5 V ± 10%,
code = midscale
DYNAMIC CHARACTERISTICS6, 8
Bandwidth –3 dB
BW
RAB = 10 kΩ/50 kΩ/100 kΩ,
code = 0x80
Total Harmonic Distortion
THDW
VA = 1 V rms, VB = 0 V, f = 1 kHz,
RAB = 10 kΩ
VW Settling Time (10 kΩ/50 kΩ/100 kΩ) tS
VA = 5 V, VB = 0 V,
±1 LSB error band
Resistor Noise Voltage Density
eN_WB
RWB = 5 kΩ, RS = 0
Min
–1
–2
–30
–1
–1
–3
0
GND
2.4
2.1
2.7
Typ1
±0.1
±0.25
45
50
±0.1
±0.3
15
–1
1
90
95
0.01
1
5
3
±0.02
600/100/40
0.1
2
9
Max
+1
+2
+30
120
+1
+1
0
3
VDD
1
0.8
0.6
±1
5.5
8
44
±0.05
Unit
LSB
LSB
%
ppm/°C
Ω
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
µA
nA
V
V
V
V
µA
pF
V
µA
µW
%/%
kHz
%
µs
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
8 All dynamic characteristics use VDD = 5 V.
Rev. B | Page 4 of 20
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