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AD5255(Rev0) 查看數據表(PDF) - Analog Devices

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AD5255 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
EEPROM INTERFACE
S1 0 1 0 0 AA0A
10
EE
EEPROM SLAVE ADDRESS
0 WRITE
S1 0 1 0 0 AA0A
10
EE
EEPROM SLAVE ADDRESS
1 READ
AD5255
MEMORY ADDRESS
A
MEMORY DATA A
MEMORY DATA A/A P
Figure 19. EEPROM Write
MEMORY DATA
A
(N BYTES + ACKNOWLEDGE)
MEMORY DATA
AP
(N BYTES + ACKNOWLEDGE)
Figure 20. EEPROM Current Read
S
SLAVE ADDRESS
W
A
MEMORY ADDRESS
A
S
SLAVE ADDRESS
R
A
MEMORY DATA
A/A
P
0 WRITE
REPEATED START
Figure 21. EEPROM Random Read
1 READ
(N BYTES + ACKNOWLEDGE)
The 256 bytes of EEPROM memory provided in the AD5255
are organized into 16 pages of 16 bytes each. The word size of
each memory location is one byte wide.
The I2C slave address of the EEPROM is 10100(A1E)(A0E),
where A1E and A0E are external pin-programmable address
bits. The 2-pin programmable address bits allow a total of four
AD5255 devices to be controlled by a single I2C master bus,
each having its own EEPROM.
An internal 8-bit address counter for the EEPROM is
automatically incremented following each read or write
operation. For read operations, the address counter is
incremented after each byte is read, and the counter rolls over
from Address 255 to 0.
For write operations, the address counter is incremented after
each byte is written. The counter rolls over from the highest
address of the current page to the lowest address of the current
page. For example, writing two bytes beginning at Address 31
causes the counter to roll back to Address 16 after the first byte
is written; then the address increments to 17 after the second
byte is written.
EEPROM Write
Each write operation issued to the EEPROM programs between
1 byte and 16 bytes (1 page) of memory. Figure 19 shows the
EEPROM write interface. The number of bytes of data, N, that
the user wants to send to the EEPROM is unrestricted. If more
than 16 bytes of data are sent in a single write operation, the
address counter rolls back to the beginning address, and the
previously sent data is overwritten.
EEPROM Write-Acknowledge Polling
After each write operation, an internal EEPROM write cycle
begins. During the EEPROM internal write cycle, the I2C
interface of the device is disabled. It is necessary to determine if
the internal write cycle is complete and whether the I2C
interface is enabled. To do so, execute I2C interface polling by
sending a start condition followed by the EEPROM slave
address plus the desired R/W bit. If the AD5255 I2C interface
responds with an ACK, the write cycle is complete and the
interface is ready to proceed with further operations. Otherwise,
the I2C interface must be polled again to determine whether the
write cycle has been completed.
EEPROM Read
The AD5255 EEPROM provides two different read operations,
shown in Figure 20 and Figure 21. The number of bytes, N, read
from the EEPROM in a single operation is unrestricted. If more
than 256 bytes are read, the address counter rolls back to the
start address, and data previously read is read again.
Figure 20 shows the EEPROM current read operation. This
operation does not allow an address location to be specified,
and reads data beginning at the current address location stored
in the internal address counter.
Rev. 0 | Page 11 of 20

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