AD5255BRU250-RL7 查看數據表（PDF） - Analog Devices

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AD5255BRU250-RL7

3-Channel Digital Potentiometer with Nonvolatile Memory

Analog Devices 

AD5255

Single supply: VDD = 3 V to 5.5 V and −40°C < TA < +85°C, unless otherwise noted.

Dual supply: VDD = 2.25 V or 2.75 V, VSS = −2.25 V or −2.75 V, and −40°C < TA < + 85°C, unless otherwise noted.

Table 2.

Parameter

Symbol

Conditions

Min Typ1

DYNAMIC CHARACTERISTICS2, 3

Bandwidth −3 dB

BW

VDD/VSS = ±2.5 V, RAB = 25 kΩ/250 kΩ

125/12

Total Harmonic Distortion

THDW

VA = 1 V rms, VB = 0 V, f = 1 kHz

0.05

VW Settling Time

tS

VA = VDD, VB = 0 V,

4/36

VW = 0.50% error band,

code 0x000 to 0x100, RAB = 25 kΩ/250 kΩ

Resistor Noise Spectral Density

eN_WB

RAB = 25 kΩ/250 kΩ, TA = 25°C

14/45

Digital Crosstalk

CT

VA = VDD, VB = 0 V, measure VW with

−80

adjacent RDAC making full-scale change

Analog Crosstalk

CAT

Signal input at A0 and measure output at

−72

W1, f = 1 kHz

INTERFACE TIMING CHARACTERISTICS

(APPLY TO ALL PARTS)4, 5

SCL Clock Frequency

fSCL

tBUF Bus Free Time Between Stop

t1

1.3

and Start

tHD;STA Hold Time (Repeated)

t2

Start Condition

After this period the first clock pulse is

600

generated

tLOW Low Period of SCL Clock

t3

1.3

tHIGH High Period of SCL Clock

t4

0.6

tSU;STA Setup Time for Repeated

t5

600

Start Condition

tHD;DAT Data Hold Time

t6

tSU;DAT Data Setup Time

t7

100

tR Rise Time of Both SDA and SCL

t8

Signals

tF Fall Time of Both SDA and SCL

t9

Signals

tSU;STO Setup Time for Stop Condition t10

600

EEMEM Data Storing Time

tEEMEM_STORE

26

EEMEM Data Restoring Time

tEEMEM_RESTORE1

360

at Power-On

EEMEM Data Restoring Time

tEEMEM_RESTORE2

360

on Restore Command or

Reset Operation

EEMEM Data Rewritable Time

tEEMEM_REWRITE

540

FLASH/EE MEMORY RELIABILITY

Endurance6

100

Data Retention7

55°C

100

Max

400

50

900

300

300

Unit

kHz

%

μs

nV√Hz

dB

dB

kHz

μs

ns

μs

μs

ns

ns

ns

ns

ns

ns

ms

μs

μs

μs

kcycles

years

1 Typical represents average readings at 25°C, VDD = 5 V.

2 Guaranteed by design and not subject to production test.

3 All dynamic characteristics use VDD = 5 V.

4 Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest

bandwidth. The highest R value results in the minimum overall power consumption.

5 See the timing diagram for location of measured values.

6 Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 Method A117 and measured at −40°C, +25°C, and +85°C; typical endurance at 25°C is 700,000 cycles.

7 Retention lifetime equivalent at junction temperature (TJ) = 55°C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV

derates with junction temperature.

Rev. A | Page 5 of 20

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