AD5263BRUZ200 查看數據表（PDF） - Analog Devices
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AD5263BRUZ200
Analog Devices
AD5263BRUZ200 Datasheet PDF : 28 Pages
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0
0x80
–6
0x40
–12
–18
0x20
–24
0x10
–30
0x08
–36
0x04
–42
0x02
–48
0x01
–54
–60
1k
10k
FREQUENCY (Hz)
TA = 25°C
VA = 50mV rms
VDD/VSS = ±5V
100k
Figure 21. Gain vs. Frequency vs. Code; RAB = 200 kΩ
0
R = 20kΩ
300kHz
–6
–12
–18
R = 50kΩ
150kHz
–24
–30
R = 200kΩ
35kHz
–36
–42
–48
–54
–60
1k
TA = 25°C
VDD/VSS = ±5V
VA = 50mV rms
10k
100k
1M
FREQUENCY (Hz)
Figure 22. Gain vs. Frequency at –3 db Bandwidth
80
CODE = 0x80, VA = VDD, VB = 0V
60
–PSRR @
VDD/VSS = ±5V DC ± 10% p-p AC
40
+PSRR @
VDD/VSS = ±5V DC ± 10% p-p AC
20
0
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 23. PSRR vs. Frequency
AD5263
CODE = 0x80
VDD/VSS = ±5.5V
VB/VA= ±5V
1
VW
CH1 50.0mV
M100ns
A CH2 2.70V
Figure 24. Digital Feedthrough
T
VDD/VSS = 5/0V
VA = 5V
VB = 0V
1
VW
CH1 50.0mV
T20.00% M2.00µs
A CH2 2.00V
Figure 25. Midscale Glitch; Code 0x80 to 0x7F
(4.7 nF Capacitor Used from Wiper to Ground)
VDD/VSS = ±5.5V
VA/VB = ±5V
VW
1
CS
2
CH1 5.00V CH2 5.00V
M400ns
A CH1 2.70V
Figure 26. Large Signal Settling Time; Code 0x00 to 0xFF
Rev. A | Page 11 of 28
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