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AD565-566A 查看數據表(PDF) - Analog Devices

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AD565-566A Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AD566A–SPECIFICATIONS(TA = +25؇C, VEE = –15 V, unless otherwise noted)
Model
AD566AJ
Min
Typ
Max
AD566AK
Min
Typ
Max
DATA INPUTS1 (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
+2.0
+5.5
+2.0
0
+0.8
0
+120
+35
+300
+100
+120
+35
+5.5
+0.8
+300
+100
RESOLUTION
12
12
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar (Adjustable to Zero per Figure 3)
Bipolar (Figure 4, R1 and R2 = 50 Fixed)
Capacitance
Compliance Voltage
TMIN to TMAX
ACCURACY (Error Relative to
Full Scale) +25°C
TMIN to TMAX
–1.6
؎0.8
6
–1.5
–2.0
± 1.0
8
0.01
0.05
25
± 1/4
(0.006)
± 1/2
(0.012)
–2.4
؎1.2
10
0.05
0.15
+10
؎1/2
(0.012)
؎3/4
(0.018)
–1.6
؎0.8
6
–1.5
–2.0
± 1.0
8
0.01
0.05
25
± 1/8
(0.003)
± 1/4
(0.006)
–2.4
؎1.2
10
0.05
0.1
+10
؎1/4
(0.006)
؎1/2
(0.012)
DIFFERENTIAL NONLINEARITY
+25°C
TMIN to TMAX
TEMPERATURE COEFFICIENTS
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
± 1/2
؎3/4
± 1/4
؎1/2
MONOTONICITY GUARANTEED MONOTONICITY GUARANTEED
1
2
5
10
7
10
2
1
2
5
10
3
5
2
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON (Figure 8)
250
350
250
350
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
15
30
30
50
15
30
30
50
POWER REQUIREMENTS
VEE, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY2
VEE = –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(see Figures 3, 4, 5)
–12
–18
15
25
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
–12
–18
15
25
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Resistor for R2 (Figure 3)
Bipolar Zero Error with Fixed
50 Resistor for R1 (Figure 4)
Gain Adjustment Range (Figure 3)
Bipolar Zero Adjustment Range
± 0.25
± 0.15
± 0.1
± 0.05
؎0.25
؎0.15
± 0.25
± 0.15
± 0.1
± 0.05
؎0.25
؎0.1
REFERENCE INPUT
Input Impedance
15
20
25
15
20
25
POWER DISSIPATION
180
300
180
300
MULTIPLYING MODE PERFORMANCE (All Models)
Quadrants
Reference Voltage
Accuracy
Reference Feedthrough (Unipolar Mode,
All Bits OFF, and 1 V to +10 V [p-p], Sine Wave
Frequency for 1/2 LSB [p-p] Feedthrough)
Output Slew Rate 10%–90%
90%–10%
Output Settling Time (All Bits ON and a 0 V–10 V
Step Change in Reference Voltage)
Two (2): Bipolar Operation at Digital Input Only
+1 V to +10 V, Unipolar
10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage
40 kHz typ
5 mA/µs
1 mA/µs
1.5 µs to 0.01% F.S.
CONTROL AMPLIFIER
Full Power Bandwidth
Small-Signal Closed-Loop Bandwidth
300 kHz
1.8 MHz
NOTES
1The digital input levels are guaranteed but not tested over the temperature range.
2The power supply gain sensitivity is tested in reference to a VEE of –1.5 V dc.
Specifications subject to change without notice.
Units
V
V
µA
µA
Bits
mA
mA
k
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
mA
ppm of F.S./%
V
V
V
V
V
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
k
mW
–4–
REV. D

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