AD5697RBRUZ-RL7 查看數據表（PDF） - Analog Devices
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AD5697RBRUZ-RL7 Datasheet PDF : 27 Pages
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Data Sheet
AD5697R
SPECIFICATIONS
VDD = 2.7 V to 5.5 V; 1.62 V ≤ VLOGIC ≤ 5.5 V; and all specifications TMIN to TMAX, unless otherwise noted. RL = 2 kΩ; and CL = 200 pF.
Table 2.
Parameter
STATIC PERFORMANCE1
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Error
Offset Error
Full-Scale Error
Gain Error
Total Unadjusted Error
Offset Error Drift2
Gain Temperature Coefficient2
DC Power Supply Rejection Ratio2
DC Crosstalk2
OUTPUT CHARACTERISTICS2
Output Voltage Range
Capacitive Load Stability
Resistive Load3
Load Regulation
Short-Circuit Current4
Load Impedance at Rails5
Power-Up Time
REFERENCE OUTPUT
Output Voltage6
Reference Temperature
Coefficient 7, 8
Output Impedance2
Output Voltage Noise2
Output Voltage Noise Density2
Load Regulation Sourcing2
Load Regulation Sinking2
Output Current Load Capability2
Line Regulation2
Thermal Hysteresis2
LOGIC INPUTS2
Input Current
Input Low Voltage, VINL
Input High Voltage, VINH
Pin Capacitance
Min
Typ Max
Unit
Test Conditions/Comments
12
Bits
±0.12 ±1
LSB
±1
LSB
Guaranteed monotonic by design
0.4 1.5
mV
All 0s loaded to DAC register
+0.1 ±1.5
mV
+0.01 ±0.1
% of FSR All 1s loaded to DAC register
±0.02 ±0.1
% of FSR
±0.01 ±0.1
% of FSR External reference; gain = 2; TSSOP
±0.2
% of FSR Internal reference; gain = 1; TSSOP
±1
µV/°C
±1
ppm
Of FSR/°C
0.15
mV/V
DAC code = midscale; VDD = 5 V ± 10%
±2
µV
Due to single channel, full-scale output change
±3
µV/mA Due to load current change
±2
µV
Due to powering down (per channel)
0
VREF
V
Gain = 1
0
2 × VREF
V
Gain = 2, see Figure 25
2
nF
RL = ∞
10
nF
RL = 1 kΩ
1
kΩ
80
µV/mA 5 V ± 10%, DAC code = midscale;
−30 mA ≤ IOUT ≤ +30 mA
80
µV/mA 3 V ± 10%, DAC code = midscale;
−20 mA ≤ IOUT ≤ +20 mA
40
mA
25
Ω
See Figure 25
2.5
µs
Coming out of power-down mode; VDD = 5 V
2.4975
2.5025
2
5
0.04
12
240
20
40
±5
100
125
25
V
At ambient
ppm/°C See the Terminology section
Ω
µV p-p
nV/√Hz
µV/mA
µV/mA
mA
µV/V
ppm
ppm
0.1 Hz to 10 Hz
At ambient; f = 10 kHz, CL = 10 nF
At ambient
At ambient
VDD ≥ 3 V
At ambient
First cycle
Additional cycles
0.7 × VLOGIC
2
±2
µA
0.3 × VLOGIC V
V
pF
Per pin
Rev. B | Page 3 of 27
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