AD624 查看數據表（PDF） - Analog Devices

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AD624

Precision Instrumentation Amplifier

Analog Devices 

INPUT

20V p-p

100k⍀

1%

1k⍀ 500⍀ 200⍀

0.1% 0.1% 0.1%

RG1

G = 100

G = 200

G = 500

RG2

10k⍀

1%

1k⍀

10T

+VS

10k⍀

1%

VOUT

AD624

AD624

–VS

Figure 25. Settling Time Test Circuit

THEORY OF OPERATION

The AD624 is a monolithic instrumentation amplifier based on

a modification of the classic three-op-amp instrumentation

amplifier. Monolithic construction and laser-wafer-trimming

allow the tight matching and tracking of circuit components and

the high level of performance that this circuit architecture is ca-

pable of.

A preamp section (Q1–Q4) develops the programmed gain by

the use of feedback concepts. Feedback from the outputs of A1

and A2 forces the collector currents of Q1–Q4 to be constant

thereby impressing the input voltage across RG.

The gain is set by choosing the value of RG from the equation,

40 k

Gain = RG + 1. The value of RG also sets the transconduct-

ance of the input preamp stage increasing it asymptotically to

the transconductance of the input transistors as RG is reduced

for larger gains. This has three important advantages. First, this

approach allows the circuit to achieve a very high open loop gain

of 3 × 108 at a programmed gain of 1000 thus reducing gain

related errors to a negligible 3 ppm. Second, the gain bandwidth

product which is determined by C3 or C4 and the input trans-

conductance, reaches 25 MHz. Third, the input voltage noise

reduces to a value determined by the collector current of the

input transistors for an RTI noise of 4 nV/√Hz at G ≥ 500.

+VS

100

200

AD624

500

RG2

–VS

+VS

16.2k⍀

1␮F

1/2

AD712

1␮F

9.09k⍀

1/2

AD712

G500

G1, 100, 200

1k⍀

1␮F

–VS

16.2k⍀

100⍀

1.62M⍀ 1.82k⍀

Figure 26. Noise Test Circuit

INPUT CONSIDERATIONS

Under input overload conditions the user will see RG + 100 Ω

and two diode drops (~1.2 V) between the plus and minus

inputs, in either direction. If safe overload current under all

conditions is assumed to be 10 mA, the maximum overload

voltage is ~ ± 2.5 V. While the AD624 can withstand this con-

tinuously, momentary overloads of ± 10 V will not harm the

device. On the other hand the inputs should never exceed the

supply voltage.

The AD524 should be considered in applications that require

protection from severe input overload. If this is not possible,

external protection resistors can be put in series with the inputs

of the AD624 to augment the internal (50 Ω) protection resis-

tors. This will most seriously degrade the noise performance.

For this reason the value of these resistors should be chosen to

be as low as possible and still provide 10 mA of current limiting

under maximum continuous overload conditions. In selecting

the value of these resistors, the internal gain setting resistor and

the 1.2 volt drop need to be considered. For example, to pro-

tect the device from a continuous differential overload of 20 V

at a gain of 100, 1.9 kΩ of resistance is required. The internal

gain resistor is 404 Ω; the internal protect resistor is 100 Ω.

There is a 1.2 V drop across D1 or D2 and the base-emitter

junction of either Q1 and Q3 or Q2 and Q4 as shown in Figure

27, 1400 Ω of external resistance would be required (700 Ω in

series with each input). The RTI noise in this case would be

4 KTRext +(4 nV / Hz )2 = 6.2 nV / Hz

+VS

I1

50␮A

VB

I2

50␮A

R52

10k⍀

A1

C3

A2

C4

50⍀

–IN

Q1, Q3

R57

20k⍀

RG1

RG2

R56 Q2,

20k⍀ Q4

13

50␮A

80.2⍀

500

124⍀

4445⍀

200

225.3⍀

100

I4

50␮A

R53

10k⍀

A3

R54

10k⍀

R55

10k⍀

50⍀

SENSE

VO

REF

+IN

–VS

Figure 27. Simplified Circuit of Amplifier; Gain Is Defined

as (R56 + R57)/(RG) + 1. For a Gain of 1, RG Is an Open

Circuit.

INPUT OFFSET AND OUTPUT OFFSET

Voltage offset specifications are often considered a figure of

merit for instrumentation amplifiers. While initial offset may

be adjusted to zero, shifts in offset voltage due to temperature

variations will cause errors. Intelligent systems can often correct

for this factor with an autozero cycle, but there are many small-

signal high-gain applications that don’t have this capability.

Voltage offset and offset drift each have two components; input

and output. Input offset is that component of offset that is

REV. C

–7–

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