AD6636(Rev0) 查看數據表（PDF） - Analog Devices
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AD6636 Datasheet PDF : 72 Pages
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AD6636
MICROPORT TIMING CHARACTERISTICS
Table 4. Microport Timing Characteristics1, 2
Parameter
MICROPORT CLOCK TIMING REQUIREMENTS
tCPUCLK CPUCLK Period
tCPUCLKL CPUCLK Low Time
tCPUCLKH CPUCLK High Time
INM MODE WRITE TIMING (MODE = 0)
tSC
Control3 to ↑CPUCLK Setup Time
tHC
Control3 to ↑CPUCLK Hold Time
tSAM
Address/Data to ↑CPUCLK Setup Time
tHAM
Address/Data to ↑CPUCLK Hold Time
tDRDY
↑CPUCLK to RDY (DTACK) Delay
tACC
Write Access Time
INM MODE READ TIMING (MODE = 0)
tSC
Control3 to ↑CPUCLK Setup Time
tHC
Control3 to ↑CPUCLK Hold Time
tSAM
Address to ↑CPUCLK Setup Time
tHAM
Address to ↑CPUCLK Hold Time
tDD
↑CPUCLK to Data Delay
tDRDY
↑CPUCLK to RDY (DTACK) Delay
tACC
Read Access Time
MNM MODE WRITE TIMING (MODE = 1)
tSC
Control3 to ↑CPUCLK Setup Time
tHC
Control3 to ↑CPUCLK Hold Time
tSAM
Address/Data to ↑CPUCLK Setup Time
tHAM
Address/Data to ↑CPUCLK Hold Time
tDDTACK ↑CPUCLK to DTACK (RDY) Delay
tACC
Write Access Time
MNM MODE READ TIMING (MODE = 1)
tSC
Control3 to ↑CPUCLK Setup Time
tHC
Control3 to ↑CPUCLK Hold Time
tSAM
Address to ↑CPUCLK Setup Time
tHAM
Address to ↑CPUCLK Hold Time
tDD
tDDTACK
CPUCLK to Data Delay
↑CPUCLK to DTACK (RDY) Delay
tACC
Read Access Time
Temp Test Level
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
V
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
V
Full
IV
Full
IV
Min
Typ
Max
Unit
10.0
ns
1.53
0.5 × tCPUCLK
ns
1.70
0.5 × tCPUCLK
ns
0.80
0.09
0.76
0.20
3.51
3 × tCPUCLK
ns
ns
ns
ns
6.72
ns
9 × tCPUCLK ns
1.00
0.03
0.80
0.20
5.0
4.50
3 × tCPUCLK
ns
ns
ns
ns
ns
6.72
ns
9 × tCPUCLK ns
1.00
0.00
0.00
0.57
4.10
3 × tCPUCLK
ns
ns
ns
ns
5.72
ns
9 × tCPUCLK ns
1.00
0.00
0.00
0.57
5.0
4.20
3 × tCPUCLK
ns
ns
ns
ns
ns
6.03
ns
9 × tCPUCLK ns
1 All timing specifications are valid over the VDDCORE range of 1.7 V to 1.9 V and the VDDIO range of 3.0 V to 3.6 V.
2 CLOAD = 40 pF on all outputs, unless otherwise noted.
3 Specification pertains to control signals: R/W (WR), DS (RD), and CS.
Rev. 0 | Page 7 of 72
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