AD6672 查看數據表（PDF） - Analog Devices

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AD6672

IF Receiver

Analog Devices 

AD6672

SPI ACCESSIBLE FEATURES

Table 12 provides a brief description of the general features that

are accessible via the SPI. These features are described in detail

in the AN-877 Application Note, Interfacing to High Speed ADCs

via SPI. The AD6672 part-specific features are described in the

Memory Map Register Description section.

Table 12. Features Accessible Using the SPI

Feature Name

Description

Mode

Allows the user to set either power-down mode or standby mode

Clock

Allows the user to access the DCS via the SPI

Offset

Allows the user to digitally adjust the converter offset

Test I/O

Allows the user to set test modes to have known data on output bits

Output Mode

Allows the user to set up outputs

Output Phase

Allows the user to set the output clock polarity

Output Delay

Allows the user to vary the DCO delay

VREF

Allows the user to set the reference voltage

Digital Processing

Allows the user to enable the synchronization features

Data Sheet

CSB

tDS

tS

tDH

tHIGH

tLOW

tCLK

SCLK DON’T CARE

SDIO DON’T CARE

R/W

W1

W0

A12

A11

A10

A9

A8

A7

tH

DON’T CARE

D5

D4

D3

D2

D1

D0

DON’T CARE

Figure 42. Serial Port Interface Timing Diagram

Rev. C | Page 24 of 30

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