AD7225LR 查看數據表（PDF） - Analog Devices
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AD7225LR Datasheet PDF : 24 Pages
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AD7225
SINGLE SUPPLY
VDD = 15 V ± 5%; VSS = AGND = DGND = 0 V; VREFx = 10 V, unless otherwise noted. All specifications TMIN to TMAX,
unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE
Resolution
Total Unadjusted Error2
Differential Nonlinearity2
REFERENCE INPUT
Voltage Range
Input Resistance
Input Capacitance3
Channel-to-Channel Isolation2, 3
AC Feedthrough2, 3
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current
Input Capacitance3
Input Coding
DYNAMIC PERFORMANCE
Voltage Output Slew Rate3
Voltage Output Settling Time3
Digital Feedthrough2, 3
Digital Crosstalk2, 3
Minimum Load Resistance
POWER SUPPLIES
VDD Range
IDD
SWITCHING CHARACTERISTICS3
t1
t2
t3
t4
t5
t6
K, B Versions1
8
±2
±1
2 to (VDD − 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2
4
10
10
2
14.25/15.75
10
50
0
0
50
0
50
L, C Versions1
8
±1
±1
2 to (VDD − 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2
4
10
10
2
14.25/15.75
10
50
0
0
50
0
50
Unit
Conditions/Comments
Bits
LSB max
LSB max
Guaranteed monotonic
V min to V max
kΩ min
pF max
dB min
dB max
Occurs when each DAC is loaded with all 1s
VREF = 10 V p-p sine wave at 10 kHz
VREF = 10 V p-p sine wave at 10 kHz
V min
V max
μA max
pF max
VIN = 0 V or VDD
V/μs min
μs max
nV sec typ
nV sec typ
kΩ min
Code transition all 0s to all 1s
Code transition all 0s to all 1s
VOUT = 10 V
V min to V max For specified performance
mA max
Outputs unloaded; VIN = VINL or VINH
ns min
ns min
ns min
ns min
ns min
ns min
Write pulse width
Address to write setup time
Address to write hold time
Data valid to write setup time
Data valid to write hold time
Load DAC pulse width
1 Temperature range is as follows for all versions: −40°C to +85°C.
2 Sample tested at 25°C to ensure compliance.
3 Switching characteristics apply for single-supply and dual-supply operation.
Rev. C | Page 4 of 24
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