DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AD7298BCPZ-RL7(RevPrA) 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
生产厂家
AD7298BCPZ-RL7
(Rev.:RevPrA)
ADI
Analog Devices ADI
AD7298BCPZ-RL7 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7298
Preliminary Technical Data
REPEAT OPERATION
The REPEAT bit in the control register allows the user to select a sequence of channels on which the AD7298 will continuously convert.
When the REPEAT bit is set in the control register, the AD7298 will continuously cycle through the selected channels in ascending order,
beginning with the lowest channel and converting all channels selected in the control register. On completion of the sequence, the AD7298
returns to the first selected channel in the control register and recommences the sequence again. The conversion sequence of the selected
channels in the repeat mode of operation continues until such time as the control register of the AD7298 is reprogrammed. If the TSENSE bit is
selected in the Control Register then the temperature conversion will be available for conversion after the last analog input channel in the
sequence has been converted. It is not necessary to write to the control register once a REPEAT operation has been initiated unless a
change in the AD7298 configuration is required. The WRITE bit must be set to zero or the DIN line tied low to ensure that the control
register is not accidentally overwritten, or the automatic conversion sequence interrupted. A write to the control register during REPEAT
mode of operation will reset the cycle even if the selected channels are unchanged. Hence, the next conversion by the AD7298 after a
write operation will be the first selected channel in the sequence.
To select a sequence of channels, the associated channel bit must be set to a logic high state (1) for each analog input whose conversion is
required. For example, if the REPEAT bit = 1 and CH1, CH2 and CH3 =1. The VIN1 analog input will be converted on the first CS falling
edge following the write to the control register, the VIN2 channel will be converted on the subsequent CS falling edge and the VIN1
conversion result will be available for reading, the third CS falling edge following the write operation will initiate a conversion on VIN3
and have the VIN2 result available for reading. The AD7298 operates with one cycle latency; hence the conversion result corresponding to
each conversion is available once serial read cycle after the cycle in which the conversion was initiated.
Figure 5. Configuring a conversion and read in REPEAT mode.
This mode of operation simplifies the operation of the device by allowing consecutive channels to be converted without having to
reprogram the control register or write to the part on each serial transfer. Figure 5 illustrates how to setup the AD7298 to continuously
convert on a particular sequence of channels. To exit REPEAT mode of operation and revert back to the traditional mode of operation of
a multi-channel ADC, ensure that the REPEAT bit = 0 on the next serial write.
Rev. PrA | Page 10 of 18

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]