AD73360L–SPECIFICATIONS1 (AVDD = 2.7 V to 3.6 V; DVDD = 2.7 V to 3.6 V; DGND = AGND = 0 V, fMCLK = 16.384 MHz,
fSCLK = 8.192 MHz, fS = 8 kHz; TA = TMIN to TMAX, unless otherwise noted.)
Parameter
AD73360LA
Min
Typ Max
Unit
Test Conditions/Comments
REFERENCE
REFCAP
Absolute Voltage, VREFCAP
REFCAP TC
REFOUT
Typical Output Impedance
Absolute Voltage, VREFOUT
Minimum Load Resistance
Maximum Load Capacitance
1.08
1.2 1.32 V
50
ppm/°C 0.1 µF Capacitor Required from REFCAP
to AGND2
130
Ω
1.08
1.2 1.32 V
1
kΩ
100
pF
Unloaded
ADC SPECIFICATIONS
Maximum Input Range at VIN2, 3
Nominal Reference Level at VIN
(0 dBm0)
Absolute Gain
PGA = 0 dB
PGA = 38 dB
Signal to (Noise + Distortion)
PGA = 0 dB
PGA = 0 dB
PGA = 38 dB
Total Harmonic Distortion
PGA = 0 dB
PGA = 38 dB
Intermodulation Distortion
Idle Channel Noise
Crosstalk ADC-to-ADC
DC Offset
Power Supply Rejection
Group Delay4, 5
Input Resistance at VIN2, 4
Phase Mismatch
1.578
–2.85
1.0954
–6.02
V p-p
dBm
V p-p
dBm
Measured Differentially
Measured Differentially
–1.3
+0.6 dB
0.6
dB
1.0 kHz
1.0 kHz
76
71
76
58
dB
0 Hz to 4 kHz; fS = 8 kHz
dB
0 Hz to 2 kHz; fS = 8 kHz; fIN = 60 Hz
dB
0 Hz to 4 kHz; fS = 64 kHz
–80 –71
dB
–64
dB
–78
dB
0 Hz to 2 kHz; fS = 8 kHz; fIN = 60 Hz
0 Hz to 2 kHz; fS = 64 kHz; fIN = 60 Hz
PGA = 0 dB
–68
dB
PGA = 0 dB, fS = 64 kHz; SCLK = 16 MHz
–95
dB
ADC1 at Idle
ADC2 to ADC6 Input Signal: 60 Hz
–30
+30
mV
PGA = 0 dB
–55
dB
Input Signal Level at AVDD and DVDD
Pins 1.0 kHz, 100 mV p-p Sine Wave
25
µs
64 kHz Output Sample Rate
50
µs
32 kHz Output Sample Rate
95
µs
16 kHz Output Sample Rate
190
µs
8 kHz Output Sample Rate
25
kΩ6
DMCLK = 16.384 MHz
0.15
Degrees fIN = 1 kHz
0.01
Degrees fIN = 60 Hz
FREQUENCY RESPONSE
(ADC)7 Typical Output
Frequency (Normalized to fS)
0
0.03125
0.0625
0.125
0.1875
0.25
0.3125
0.375
0.4375
> 0.5
0
dB
–0.1
dB
–0.25
dB
–0.6
dB
–1.4
dB
–2.8
dB
–4.5
dB
–7.0
dB
–9.5
dB
< –12.5
dB
LOGIC INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IIH, Input Current
CIN, Input Capacitance
VDD – 0.8
0
VDD
V
0.8
V
10
µA
10
pF
–2–
REV. 0